8-bit alu

Created for CS63 at Earlham College

For my programming project, I have chosen to simulate an 8-bit ALU using Logic Sim. I came up with two designs, both of which were based on a one bit ALU, which I made into a module.


My first design for the 8-bit ALU was to simply string 8 1-bit ALUs together with the carry-out from from one ALU connected the carry in of the next ALU.

Based on problem 14 in Chapter 3 of Tananbaum, I made a second design with the basis that the carry-in to a stage is true if any two or three of the addend, the augend, or the carry-in of the previous stage are true.

Notice that the carry-out pin on the 1-bit ALU module is not used. Also notice that all the outputs are duplicated: 1 is right next to module and another one is on the left side of the diagram. This is so all the outputs can be easily seen at once.


      I tested this new design by adding parallel bits in the A and B inputs and checking to see if a 1 carried over into the next bit for the answer. All bits were verified to be working correctly.
      To test my new design against the old one, I first slowed the simulation speed down (under Simulation: Options in the menu), so any difference would be more noticeable. I set F1 and F0 to 1, causing the ALU to perform as an adder. I then added 1 to 11111111, and noticed the speed at which the 1's in the output changed to zero's and the carry-out bit was activated.
      Unfortunately, there was no visible difference in the propagation time, and Logic Sim does not include tools to measure the time more precisely.

You can download the actual Logic Sim files by holding the down the mouse over a link and choosing the SAVE AS... option.
1-bit ALU
1-bit ALU module file
first 8-bit ALU design
second 8-bit ALU design

Mark Stosberg's homepage


Last Modified December, 1997